Pupil detection in hardware using FPGA

2012 IEEE 14th International Conference on e-Health Networking, Applications and Services (Healthcom) Pub Date : 2012-12-13 DOI:10.1109/HealthCom.2012.6379437

L. Schwarz, H. Gamba, Fabio Cabral Pacheco, M. A. Sovierzoski

引用次数: 0

Abstract

This paper describes the design of a hardware based system to locate and measure the pupil size using FPGA. The system was implemented in a Cyclone 4E EP4CE115F29C7, from Altera. The component has 114,480 logic elements, although only 8% of the component was used. To detect the pupil the system uses the Greedy Snakes Algorithm at 50 MHz input clock. The system was tested on a video with 30 fps, however, it is possible to process videos in real-time up to 60 fps.

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使用 FPGA 进行硬件瞳孔检测

本文介绍了利用 FPGA 定位和测量瞳孔大小的硬件系统设计。该系统由 Altera 公司的 Cyclone 4E EP4CE115F29C7 实现。该组件有 114,480 个逻辑元件，但只使用了其中的 8%。为了检测瞳孔，系统使用了 50 MHz 输入时钟的贪婪之蛇算法。该系统在 30 帧/秒的视频上进行了测试，但也可以实时处理高达 60 帧/秒的视频。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

2012 IEEE 14th International Conference on e-Health Networking, Applications and Services (Healthcom)

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