Thermal Aware Application Mapping and Frequency Scaling for Mesh-Based Network-On-Chip Design

Abstract

On-chip communication is being regarded as one of the most crucial issues in System-on-Chip (SoC) design. Bandwidth limitation of interconnection buses has opened a wide scope of research to find better alternatives. Network-on-Chip (NoC) has expanded manifold to resolve this congestion. As the number of cores residing on a SoC is increasing significantly (MPSoC), the issue of Application mapping is becoming more and more complex. Given an application represented in the form of a core graph, application mapping can be realized as attaching cores performing tasks to routers. The performance of the overall system depends on the application mapping as well as the topology structure. Energy and reliability optimization are two of the most critical objectives for the synthesis of multiprocessor systems. This report also proposes a thermal-aware mapping with limited degradation in communication cost. The combined objective of minimizing overall finish time under a given energy budget is solved by using a multi-objective discrete particle swarm optimization algorithm exploiting task mapping and frequency selection on a mesh based network. Experiments are conducted with synthetic application task graphs to demonstrate the performance of the proposed solution strategy.