ParaGraph: An application-simulator interface and toolkit for hardware-software co-design

Mikhail Isaev, Nic McDonald, Jeffrey S. Young, R. Vuduc
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引用次数: 1

Abstract

ParaGraph is an open-source toolkit for use in co-designing hardware and software for supercomputer-scale systems. It bridges an infrastructure gap between an application target and existing high-fidelity computer-network simulators. The first component of ParaGraph is a high-level graph representation of a parallel program, which a) faithfully represents parallelism and communication, b) can be extracted automatically from a compiler, and c) is “tuned” for use with network simulators. The second is a runtime that can emulate the representation’s dynamic execution for a simulator. User-extensible mechanisms are available for modeling on-node performance and transforming high-level communication into operations that backend simulators understand. Case studies include deep learning workloads that are extracted automatically from programs written in JAX and TensorFlow and interfaced with several event-driven network simulators. These studies show how system designers can use ParaGraph to build flexible end-to-end software-hardware co-design workflows to tweak communication libraries, find future hardware bottlenecks, and validate simulations with traces.
段落:用于硬件软件协同设计的应用程序模拟器接口和工具包
ParaGraph是一个开源工具包,用于为超级计算机规模的系统协同设计硬件和软件。它在应用程序目标和现有的高保真计算机网络模拟器之间架起了一座桥梁。ParaGraph的第一个组件是并行程序的高级图形表示,它a)忠实地表示并行性和通信,b)可以从编译器中自动提取,c)被“调优”用于网络模拟器。第二个是运行时,可以模拟表示的动态执行模拟器。用户可扩展机制可用于对节点上的性能进行建模,并将高级通信转换为后端模拟器可以理解的操作。案例研究包括从JAX和TensorFlow编写的程序中自动提取的深度学习工作负载,并与几个事件驱动的网络模拟器接口。这些研究表明,系统设计人员可以使用ParaGraph来构建灵活的端到端软硬件协同设计工作流,以调整通信库,找到未来的硬件瓶颈,并通过跟踪验证模拟。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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