Parameterized models for a RF chip-to-substrate interconnect

Abstract

Skyrocketing growth in the cellular personal communications services (PCS) sector has fueled the needs for higher density, more functionality, and greater performance on both handset and base stations. Third generation wireless standards, which require hardware upgrades, loom on the horizon. RF component suppliers are scrambling to find solutions at the IC, package, and PCB levels to meet these challenges. RF module packaging is considered as one of the low cost solutions for the future wireless products. One of the critical design needs for RF interconnects is to understand the electrical performance of wire bond (the RF interconnect of choice) at and above frequency of interest, and to determine the performance limit for the wire bond chip-to-substrate interconnect. The availability of design kit or library would result in a substantial reduction in design cycle times. Using wire bond as example, this paper illustrates the developmental stages that turn electromagnetic characteristics of a physical structure into a design library. Fullwave simulation using Ansoft HFSS and compact models extraction using optimization tool for wire bond are shown, followed by in-depth discussions of wire bond parameterized models. Validation of parameterized model by measurement is presented.