Michal Sovcík, Michal Matuska, D. Arbet, V. Stopjaková
{"title":"CMOS variable-gain amplifier for low-frequency applications","authors":"Michal Sovcík, Michal Matuska, D. Arbet, V. Stopjaková","doi":"10.1109/DDECS.2016.7482477","DOIUrl":null,"url":null,"abstract":"Design of variable-gain amplifier (VGA), based on fully differential operational amplifier is presented. The proposed VGA topology was verified through simulations and analysis of main circuit parameters. The VGA is designed in 0.35 μm CMOS technology using Cadence environment and BSIM3 family of models. Designed circuit works with the power supply of 3.3 V. The simulation results show that gain bandwidth (GBW) of about 12 MHz (for capacitive load of 1 pF) and the total harmonic distortion of less than 1% for input amplitude 100 mV were achieved. Implemented feedback circuit is stable according to phase margin of 68.15°.","PeriodicalId":404733,"journal":{"name":"2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS)","volume":"73 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-04-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DDECS.2016.7482477","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
Design of variable-gain amplifier (VGA), based on fully differential operational amplifier is presented. The proposed VGA topology was verified through simulations and analysis of main circuit parameters. The VGA is designed in 0.35 μm CMOS technology using Cadence environment and BSIM3 family of models. Designed circuit works with the power supply of 3.3 V. The simulation results show that gain bandwidth (GBW) of about 12 MHz (for capacitive load of 1 pF) and the total harmonic distortion of less than 1% for input amplitude 100 mV were achieved. Implemented feedback circuit is stable according to phase margin of 68.15°.