A high step-down DC-DC converter with low switch voltage stress and extremely low output current ripple

Morteza Esteki, Nasrin Einabadi, E. Adib, H. Farzanehfard
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引用次数: 4

Abstract

In this paper, an interleaved high step-down DC-DC converter with low switch voltage stress is proposed. The proposed converter provides an extended duty cycle for switches and also, the voltage stress across two switches and two didoes is one fourth of the input voltage and for the other semiconductor elements is smaller than half of the input voltage. This voltage stress is much lower than that of conventional interleaved buck which makes it possible to use switches and diodes with lower voltage rating. As a results both switching and conduction losses, can be reduced and consequently the overall efficiency can be improved. Another advantage of the proposed converter is its extremely low output current ripple which requires an additional small inductor. All these benefit are obtained without applying additional stress on active components or using transformers. The simulation results based on a 480W, 400 to 48 V dc/dc prototype verify the effectiveness of the theoretical analysis.
一种高降压DC-DC变换器,具有低开关电压应力和极低输出电流纹波
本文提出了一种具有低开关电压应力的交错高降压DC-DC变换器。所提出的转换器为开关提供了延长的占空比,并且,两个开关和两个二极管之间的电压应力是输入电压的四分之一,而对于其他半导体元件则小于输入电压的一半。这种电压应力比传统的交错降压要低得多,这使得使用额定电压较低的开关和二极管成为可能。因此,开关和导通损耗都可以降低,从而可以提高整体效率。所提出的转换器的另一个优点是其极低的输出电流纹波,这需要一个额外的小电感。所有这些优点都是在没有对有源元件施加额外应力或使用变压器的情况下获得的。基于480W、400 ~ 48v dc/dc样机的仿真结果验证了理论分析的有效性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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