Hyung-Gu Park, Joonsung Park, Younggun Pu, Seung-ok Lim, Yeon-Kuk Moon, Sun-Hee Kim, Kangyoon Lee
{"title":"A design of high efficiency class-E power amplifier for wireless power transfer system","authors":"Hyung-Gu Park, Joonsung Park, Younggun Pu, Seung-ok Lim, Yeon-Kuk Moon, Sun-Hee Kim, Kangyoon Lee","doi":"10.1109/IMWS2.2011.6027207","DOIUrl":null,"url":null,"abstract":"In this paper, class-E power amplifier (PA) with automatic power control loop and load compensation circuit is presented. The transmitted power is controlled by adjusting the signal applied to the gate of the power control transistor. In addition, a parallel capacitor is also controlled to enhance the efficiency and compensate for the load variation. This chip is implemented in a 0.35 µm BCD technology, and provides the output power control range of 10–30.2 dBm. The maximum power efficiency of the power amplifier is 71.5 %.","PeriodicalId":367154,"journal":{"name":"2011 IEEE MTT-S International Microwave Workshop Series on Intelligent Radio for Future Personal Terminals","volume":"85 5 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-09-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 IEEE MTT-S International Microwave Workshop Series on Intelligent Radio for Future Personal Terminals","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IMWS2.2011.6027207","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 8
Abstract
In this paper, class-E power amplifier (PA) with automatic power control loop and load compensation circuit is presented. The transmitted power is controlled by adjusting the signal applied to the gate of the power control transistor. In addition, a parallel capacitor is also controlled to enhance the efficiency and compensate for the load variation. This chip is implemented in a 0.35 µm BCD technology, and provides the output power control range of 10–30.2 dBm. The maximum power efficiency of the power amplifier is 71.5 %.