{"title":"A 290MHz 50dB Programmable Gain Amplifier for Wideband Communications","authors":"Hua-Chin Lee, Chien-Chih Lin, Chorng-Kuang Wang","doi":"10.1109/ASSCC.2006.357930","DOIUrl":null,"url":null,"abstract":"This paper presents a CMOS programmable gain amplifier (PGA) with 3dB bandwidth greater than 290MHz. The PGA can provide 50dB gain with 20dB gain control range, and the gain step is ldB with -0.4 to +0.4dB gain error. The minimal acceptable input signal is -52dBm and the 1dB compression point is -6dBm. It consumes 4 mA in core stage from IV supply voltage. This PGA is fabricated in 90nm CMOS one-poly nine-metal digital process and the core area is 0.2x0.15 mm2.","PeriodicalId":142478,"journal":{"name":"2006 IEEE Asian Solid-State Circuits Conference","volume":"53 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 IEEE Asian Solid-State Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASSCC.2006.357930","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 8
Abstract
This paper presents a CMOS programmable gain amplifier (PGA) with 3dB bandwidth greater than 290MHz. The PGA can provide 50dB gain with 20dB gain control range, and the gain step is ldB with -0.4 to +0.4dB gain error. The minimal acceptable input signal is -52dBm and the 1dB compression point is -6dBm. It consumes 4 mA in core stage from IV supply voltage. This PGA is fabricated in 90nm CMOS one-poly nine-metal digital process and the core area is 0.2x0.15 mm2.