Chunyang Zhai, Jeffrey Fredenburg, John Bell, M. Flynn
{"title":"An N-path filter enhanced low phase noise ring VCO","authors":"Chunyang Zhai, Jeffrey Fredenburg, John Bell, M. Flynn","doi":"10.1109/VLSIC.2014.6858448","DOIUrl":null,"url":null,"abstract":"A novel self-filtering scheme breaks the typical tradeoff between noise and power, enabling a ring oscillator to approach the phase noise performance of an LC oscillator. The prototype N-path filter enhanced voltage-controlled ring oscillator (NPFRVCO) achieves a measured phase noise of -110dBc/Hz at a 1MHz offset frequency for an oscillation frequency of 1.0GHz. The self-clocked N-path filter reduces the phase noise by 10dB and 28dB for 1.0GHz and 300MHz oscillation frequencies, respectively. Implemented in 65nm CMOS, the NPFRVCO occupies a die area of 0.015 mm2 and consumes 4.7mW from 1.2V power supply when operating at 1.0GHz. The NPFRVCO has a measured frequency tuning range from 300MHz to 1.6GHz and achieves a FoM of 163dB at 1MHz offset.","PeriodicalId":381216,"journal":{"name":"2014 Symposium on VLSI Circuits Digest of Technical Papers","volume":"153 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-06-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"13","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 Symposium on VLSI Circuits Digest of Technical Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIC.2014.6858448","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 13
Abstract
A novel self-filtering scheme breaks the typical tradeoff between noise and power, enabling a ring oscillator to approach the phase noise performance of an LC oscillator. The prototype N-path filter enhanced voltage-controlled ring oscillator (NPFRVCO) achieves a measured phase noise of -110dBc/Hz at a 1MHz offset frequency for an oscillation frequency of 1.0GHz. The self-clocked N-path filter reduces the phase noise by 10dB and 28dB for 1.0GHz and 300MHz oscillation frequencies, respectively. Implemented in 65nm CMOS, the NPFRVCO occupies a die area of 0.015 mm2 and consumes 4.7mW from 1.2V power supply when operating at 1.0GHz. The NPFRVCO has a measured frequency tuning range from 300MHz to 1.6GHz and achieves a FoM of 163dB at 1MHz offset.