{"title":"Research on 2-out-of-2 multiplying 2 redundancy system used in high-speed train","authors":"Dai Shenghua, L. Yishi","doi":"10.1109/CSAE.2011.5952513","DOIUrl":null,"url":null,"abstract":"The development of high-speed train improves the standard of Board computer. Its Reliability is now more and more important. And Redundancy technology is a common way for this. This article will introduce a economical way to construct a redundant system based on FPGA. This redundant system is mainly 2-out-of-2 multiplying 2 redundant. It mainly consists of four modules: CPU core module, watch dog module, compare module and switch module. Then a series of rules will be set to make sure that the system can work in a higher reliability. Then we will analysis the system with RAMS theory. What's more, A real system has been constructed based on Actel FPGA accord to this architecture. It is convenient to compare data on instruction bus, so this kind of comparison is taken in the system. Then at the end of this article, the simulated output results will be shown to you. This is a construction meaningful.","PeriodicalId":138215,"journal":{"name":"2011 IEEE International Conference on Computer Science and Automation Engineering","volume":"328 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-06-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 IEEE International Conference on Computer Science and Automation Engineering","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CSAE.2011.5952513","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6
Abstract
The development of high-speed train improves the standard of Board computer. Its Reliability is now more and more important. And Redundancy technology is a common way for this. This article will introduce a economical way to construct a redundant system based on FPGA. This redundant system is mainly 2-out-of-2 multiplying 2 redundant. It mainly consists of four modules: CPU core module, watch dog module, compare module and switch module. Then a series of rules will be set to make sure that the system can work in a higher reliability. Then we will analysis the system with RAMS theory. What's more, A real system has been constructed based on Actel FPGA accord to this architecture. It is convenient to compare data on instruction bus, so this kind of comparison is taken in the system. Then at the end of this article, the simulated output results will be shown to you. This is a construction meaningful.