Circuit delay computation based on ITTPN

Abstract

Circuit delay computation is important in circuit systems. Petri net can reveal the structure information and dynamic behavior of systems. In this paper the circuit delay computation is concerned based on Petri net. T-Timed Petri net with special inhibitor arcs (ITTPN) is extended. A direct translation method from combinational circuit to ITTPN based on fixed delay model under the assumption of floating mode operation is introduced and a circuit delay computation algorithm based on complete finite prefix is proposed. Finally, an example is included to illustrate the method efficiency.