A Review on Current-Steering DAC Design

2023 International Conference on Electronics, Information, and Communication (ICEIC) Pub Date : 2023-02-05 DOI:10.1109/ICEIC57457.2023.10049912

Xian Yang Lim, Wu Cong Lim, Boon Chiat Terence Teo, V. Navaneethan, Chong Boon Tan, Nardi Utomo, L. Siek, A. Alvandpour

引用次数: 0

Abstract

This article discusses the design considerations of a current-steering digital-to-analogue converter (CSDAC) and reviews some techniques that addresses non-ideal behaviors of a CSDAC. To understand the design considerations and how non-idealities affect the performance of a CSDAC, a 12-bit CSDAC is designed in TSMC 40nm technology node and the simulation results are provided.

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电流导向DAC设计综述

本文讨论了电流转向数模转换器(CSDAC)的设计注意事项，并回顾了解决CSDAC非理想行为的一些技术。为了了解CSDAC的设计考虑以及非理想性对其性能的影响，在台积电40nm技术节点上设计了一个12位CSDAC，并给出了仿真结果。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

2023 International Conference on Electronics, Information, and Communication (ICEIC)

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