10-Gb/s CMOS ultrahigh-speed gold-code generator using differential-switches feedback

Abstract

This paper proposes a new architecture for the implementation of an n-input XOR gate in ultrahigh-speed applications. The new circuitry makes it possible to let the conventional sequence logic with XOR feedback, such as Gold code generator, to work up to ten-gigabit per second. This paper will systematically describe the principle of substituting a set of differential switches for an XOR gate. The proposed circuitry is demonstrated in a five-stage Gold code generator implemented in TSMC 0.18-mum 1P6M CMOS process. The simulation results show that the delay of the proposed four-input XOR gate is so much improved as to let the five-stage (5,3) and (5,4,3,2) Gold code generator to work up to 10 Gb/s.