Power efficient inter-module communication for digit-serial DSP architectures in deep-submicron technology

I. Dhaou, E. Dubrova, H. Tenhunen
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引用次数: 17

Abstract

This paper investigates the use of quaternary current mode signaling to minimize the power dissipation associated with inter-module communication. We formulate a condition specifying when the insertion of the encode-decoder pair between the two modules results in a reduction of the overall power consumption of the system. An algorithm LIBCOM is developed which utilizes this condition to insert the encoder-decoder pair between the two modules only if it is advantageous. The HSPICE results obtained for 0.35 /spl mu/m CMOS process show that LIBCOM can reduce the power consumption by 15%. As technology scales down, the power saved by our algorithm can be several orders of magnitude higher.
深亚微米技术中数字串行DSP架构的高能效模块间通信
本文研究了使用四元电流模式信号来最小化与模块间通信相关的功耗。我们制定了一个条件,指定在两个模块之间插入编码-解码器对时,系统的总功耗会降低。LIBCOM算法利用这一条件,只在有利的情况下在两个模块之间插入编解码器对。在0.35 /spl mu/m的CMOS工艺上得到的HSPICE结果表明,LIBCOM可以降低15%的功耗。随着技术规模的缩小,我们的算法节省的功率可以提高几个数量级。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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