{"title":"Power efficient inter-module communication for digit-serial DSP architectures in deep-submicron technology","authors":"I. Dhaou, E. Dubrova, H. Tenhunen","doi":"10.1109/ISMVL.2001.924555","DOIUrl":null,"url":null,"abstract":"This paper investigates the use of quaternary current mode signaling to minimize the power dissipation associated with inter-module communication. We formulate a condition specifying when the insertion of the encode-decoder pair between the two modules results in a reduction of the overall power consumption of the system. An algorithm LIBCOM is developed which utilizes this condition to insert the encoder-decoder pair between the two modules only if it is advantageous. The HSPICE results obtained for 0.35 /spl mu/m CMOS process show that LIBCOM can reduce the power consumption by 15%. As technology scales down, the power saved by our algorithm can be several orders of magnitude higher.","PeriodicalId":297353,"journal":{"name":"Proceedings 31st IEEE International Symposium on Multiple-Valued Logic","volume":"11 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2001-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"17","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings 31st IEEE International Symposium on Multiple-Valued Logic","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISMVL.2001.924555","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 17
Abstract
This paper investigates the use of quaternary current mode signaling to minimize the power dissipation associated with inter-module communication. We formulate a condition specifying when the insertion of the encode-decoder pair between the two modules results in a reduction of the overall power consumption of the system. An algorithm LIBCOM is developed which utilizes this condition to insert the encoder-decoder pair between the two modules only if it is advantageous. The HSPICE results obtained for 0.35 /spl mu/m CMOS process show that LIBCOM can reduce the power consumption by 15%. As technology scales down, the power saved by our algorithm can be several orders of magnitude higher.