{"title":"A New High Power Switching Transistor","authors":"K. S. Tarneja, P. Hower","doi":"10.7567/SSDM.1982.A-4-5","DOIUrl":null,"url":null,"abstract":"The overall objectives of this paper is to present the development of device design and process techniques for the fabrication of high current, fast switching transistors in the range of 400-500 VCEO(SUS) range. This paper discusses how the results obtained on a 23mm device have been applied to a larger diameter (33mm) transistor. An improved base contact for equalizing the base-emitter voltage at high currents has been developed along with an improved emitter-contact preform which increases the silicon area available for current conduction. The electrical performance achieved is consistent with the theoretical optimum design. This paper describes the device design, wafer-processing techniques, and various measurements including forward SOA, DC characteristics and switching times.","PeriodicalId":166040,"journal":{"name":"1981 Annual Meeting Industry Applications Society","volume":"4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1981-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"1981 Annual Meeting Industry Applications Society","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.7567/SSDM.1982.A-4-5","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
The overall objectives of this paper is to present the development of device design and process techniques for the fabrication of high current, fast switching transistors in the range of 400-500 VCEO(SUS) range. This paper discusses how the results obtained on a 23mm device have been applied to a larger diameter (33mm) transistor. An improved base contact for equalizing the base-emitter voltage at high currents has been developed along with an improved emitter-contact preform which increases the silicon area available for current conduction. The electrical performance achieved is consistent with the theoretical optimum design. This paper describes the device design, wafer-processing techniques, and various measurements including forward SOA, DC characteristics and switching times.