Abhishek Kumar, B. Pandey, D. M. Akbar Hussain, M. Atiqur Rahman, Vishal Jain, Ayoub Bahanasse
{"title":"Low Voltage Complementary Metal Oxide Semiconductor Based Energy Efficient UART Design on Spartan-6 FPGA","authors":"Abhishek Kumar, B. Pandey, D. M. Akbar Hussain, M. Atiqur Rahman, Vishal Jain, Ayoub Bahanasse","doi":"10.1109/CICN.2019.8902356","DOIUrl":null,"url":null,"abstract":"UART is the most popular two-wire communication interface. It is recognized as Universal Asynchronous Receiver Transmitter. It is a one of the essential element in Communication System to communicate two micro controller based system. It is widely used in case of small distance communication. The implementation of UART's with VHDL can be unified into FPGA for the achievement of stable, reliable, and compact data transmission. Our main aim to implement and design an energy efficient model for that we have used the LVCMOS IO standards and we are comparing our design with a normal UART. In this paper, it has been illustrated that the demand for total power reduced with LVCMOS IO/Standard based UARTs in compare to default IO standards. This paper illustrates differences on the basis of the power consumption by the LVCMOS based energy efficient Universal Asynchronous Receiver Transmitter (UART) and Default IO/Standard based UARTs.","PeriodicalId":329966,"journal":{"name":"2019 11th International Conference on Computational Intelligence and Communication Networks (CICN)","volume":"19 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 11th International Conference on Computational Intelligence and Communication Networks (CICN)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICN.2019.8902356","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
UART is the most popular two-wire communication interface. It is recognized as Universal Asynchronous Receiver Transmitter. It is a one of the essential element in Communication System to communicate two micro controller based system. It is widely used in case of small distance communication. The implementation of UART's with VHDL can be unified into FPGA for the achievement of stable, reliable, and compact data transmission. Our main aim to implement and design an energy efficient model for that we have used the LVCMOS IO standards and we are comparing our design with a normal UART. In this paper, it has been illustrated that the demand for total power reduced with LVCMOS IO/Standard based UARTs in compare to default IO standards. This paper illustrates differences on the basis of the power consumption by the LVCMOS based energy efficient Universal Asynchronous Receiver Transmitter (UART) and Default IO/Standard based UARTs.