An ultra wide bandwidth power divider on MMIC operating 4 to 10 GHz

J. Staudinger
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引用次数: 7

Abstract

A circuit topology is presented for realizing power dividers with bandwidths of 2.5:1 or greater on MMIC. This topology consists of lumped-element interconnected networks and is thus ideally suited for MMIC technology. This proposed minimum-element topology favors component values that are easily realizable and thus minimize losses due to low-Q elements. A three-way divider was fabricated that achieved 5.8-dB nominal insertion loss and 18-dB isolation form 4 to 10 GHz. The circuit was designed on a 60-mil*60-mil chip and included RF probe pads at each port to allow measurement of on-chip performance. all circuit components were realized as MIM capacitors. NiCr resistors, and air bridge inductors. A short length of high-impedance transmission line was included at the input on the divider to compensate for the parasitic nature of the lumped elements. Excellent agreement was obtained between measured and predicted performance.<>
在MMIC上工作4到10 GHz的超宽带功率分配器
提出了在MMIC上实现带宽为2.5:1或更大的功率分配器的电路拓扑结构。这种拓扑结构由集总元素互连网络组成,因此非常适合MMIC技术。这种建议的最小元素拓扑有利于易于实现的组件值,从而最大限度地减少低q元素造成的损失。制作了一个三路分压器,在4至10 GHz范围内实现了5.8 db标称插入损耗和18 db隔离。该电路设计在60mil * 60mil芯片上,每个端口都包含RF探针垫,以便测量片上性能。所有电路元件均实现为MIM电容器。NiCr电阻器和气桥电感器。在分压器的输入端加入短长度的高阻抗传输线,以补偿集总元件的寄生特性。测量结果与预测结果非常吻合。
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