{"title":"Low-power class-AB flipped source follower filter for voltage-sensitive applications","authors":"Diksha Thakur, K. Sharma","doi":"10.1109/DevIC57758.2023.10134848","DOIUrl":null,"url":null,"abstract":"Low pass filter (LPF) architecture is an indispensable block of voltage-sensitive applications. However, designing a LPF which delivers low figure-of-merit (FOM) along with lowpower operation is crucial. The paper recommends a low-power quasi-floating gate (QFG) class-AB flipped source follower (FSF) LPF architecture based on QFG MOS technique. The proposed LPF architecture is designed in Cadence using BSIM3V3180 nm CMOS technology which works at 0.5 V, delivers gain of -4.5dB, bandwidth of 100 Hz, input referred noise of S6 $\\mu \\mathrm{V}_{\\mathrm{r}\\mathrm{m}\\mathrm{s}}$, total harmonic distortion of -50.26dB, input voltage range of100 m$\\mathrm{V}_{\\mathrm{p}\\mathrm{p}}$ at frequency of SO Hz, power of 0.056 nW. The proposed QFG class-AB FSF LPF is suitable candidate for voltage-sensitive applications such as geoenvironmental monitoring, biomedical and healthcare etc.","PeriodicalId":255315,"journal":{"name":"2023 IEEE Devices for Integrated Circuit (DevIC)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-04-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 IEEE Devices for Integrated Circuit (DevIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DevIC57758.2023.10134848","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
Low pass filter (LPF) architecture is an indispensable block of voltage-sensitive applications. However, designing a LPF which delivers low figure-of-merit (FOM) along with lowpower operation is crucial. The paper recommends a low-power quasi-floating gate (QFG) class-AB flipped source follower (FSF) LPF architecture based on QFG MOS technique. The proposed LPF architecture is designed in Cadence using BSIM3V3180 nm CMOS technology which works at 0.5 V, delivers gain of -4.5dB, bandwidth of 100 Hz, input referred noise of S6 $\mu \mathrm{V}_{\mathrm{r}\mathrm{m}\mathrm{s}}$, total harmonic distortion of -50.26dB, input voltage range of100 m$\mathrm{V}_{\mathrm{p}\mathrm{p}}$ at frequency of SO Hz, power of 0.056 nW. The proposed QFG class-AB FSF LPF is suitable candidate for voltage-sensitive applications such as geoenvironmental monitoring, biomedical and healthcare etc.