Design of S Band Low Noise Amplifier with on chip Spiral inductors using Indigenous 180nm Digital CMOS process

Abstract

This paper presents, design and development of CMOS LNA using on chip passive spiral inductors to demonstrate the capability of Indigenous CMOS foundry for designing RF CMOS circuits for various future requirements. Fully integrated S Band LNA designed using cascode source degeneration topology in standard Logic 180 nm CMOS process to achieve optimum noise figure and gain at 2492±9 MHz band. The on wafer test has been carried out and measured results are shown in the final section.