A 94-μW 10-b neural recording front-end for an implantable brain-machine-brain interface device

Abstract

This paper describes a fully integrated neural recording front-end comprising a low-noise two-stage amplification circuitry and a 10-b successive approximation register (SAR)-based ADC as part of a fully implantable brain-machine-brain interface (BMBI) device for neuroanatomical rewiring of cortical circuitry in an injured brain. Fabricated using the TSMC 0.35 mum 2P/4M n-well CMOS process, the ac-coupled amplification circuitry provides a maximum mid-band ac gain of ~52 dB and features a measured input-referred voltage noise of 3.5 muVrms from 0.1 Hz to 12.8 kHz, while dissipating ~78 muW from 2 V. The SAR ADC features an ENOB of ~9.4 for maximum sampling frequency of ~45 kSa/s, while dissipating only 16 muW. Benchtop as well as in vitro measurement results in saline are reported.