{"title":"Discrete Time model of Coupled Inductor based Bidirectional DC-DC Converter","authors":"B. Madhuri, D. Krishna","doi":"10.1109/ICEES.2019.8719317","DOIUrl":null,"url":null,"abstract":"The present work emphasize on the small signal discrete averaged time model of a pulse width modulated coupled inductor based bidirectional dc-dc converter (CI-BDC). Discrete averaged time model is used to predict the accurate model of the proposed converter in order to overcome the drawbacks of classical averaging techniques. Distinct behavior of converter is presented, when leading and trailing edge PWM techniques are applied. Proposed dc-dc converter is to avoid extreme values of duty ratio while coalescing low DC voltage sources with high DC voltage and to reduce the voltage and current (V/I) stress on the semiconductor devices of the power converter. A lead-lag compensation is introduced to avoid the instability due to right hand zero and better performance.","PeriodicalId":421791,"journal":{"name":"2019 Fifth International Conference on Electrical Energy Systems (ICEES)","volume":"84 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 Fifth International Conference on Electrical Energy Systems (ICEES)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICEES.2019.8719317","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
The present work emphasize on the small signal discrete averaged time model of a pulse width modulated coupled inductor based bidirectional dc-dc converter (CI-BDC). Discrete averaged time model is used to predict the accurate model of the proposed converter in order to overcome the drawbacks of classical averaging techniques. Distinct behavior of converter is presented, when leading and trailing edge PWM techniques are applied. Proposed dc-dc converter is to avoid extreme values of duty ratio while coalescing low DC voltage sources with high DC voltage and to reduce the voltage and current (V/I) stress on the semiconductor devices of the power converter. A lead-lag compensation is introduced to avoid the instability due to right hand zero and better performance.