Silicon MOSFET Technology For Wireless Communications

Abstract

Silicon MOSFET technology using 1.5um gate lengths has demonstrated excellent performance for 9OOMHz applications. Circuit results for low noise amplifiers, power amplifiers, mixers, and oscillators using this technology will be discussed in comparison to other device technologies. Device results for 0.6um gate length devices showing the microwave performance of silicon MOS transistors are discussed. These results together with scaling predictions indicate that silicon MOSFETs operating at frequencies up to 3 G H z will play a major role for the wireless communication systems. Introduction: Activity in silicon MOS technologies for RF applications has been increasing due to the needs for robust and low cost technologies for personal communication systems. Most of the activity in RF MOS has been in the power amplification area:; where both vertical a lateral FETs have been used for multi Watt amplifiers a t frequencies below 1 GHz [1,21. The work reported in this paper will concentrate on lateral devices where both source and drain are accessible from the front side of the silicon. This paper will demonstrate the R F capabilities of this technology beyond power amplifiers and will discuss the results of various RF functions found in a portable radio. This technology which is CMOS like in nature has demonstrated excellent F F performance, thus opening up new exciting possibilities for mixed signal applications and higher levels of integration. Devices with 0.6um gate lengths show excellent microwave performance of both the Nand P-channel devices, which opens new exciting RF icomplementary circuit solutions. This technology IS simple, robust , and manufacturable, which combined with its excellent RF performance makes it a major player in the competing device technologies for vvireless communication svstem s. Silicon MOSFET Device Technology: The basic device cross-section i s shown in Figure 1. The device is fabricated on a heavy P + substrate which is used to carry the source current and pirovide a high Q ground plane close to the active devices. The active area is then built on a Pepi structure. A thick field oxide (2.5um) is grown using high pressure oxidation techniques PO minimize the metal capacitance to ground. Vias from the front side to the substrate are achieved using P + sinkers that conveniently take the source of the MOSFET to ground with minimal source lead inductance. The gates are silicided such that gate access resistance is lowered to achieve the required power gains and low noise figures. Unlike regular CMOS technology, the device is unilateral and has a long drain extension to provide .the necessary drain to source breakdown voltage. The device also has a P-base region that adjusts the device threshold and provides resistance to drain to source punch through. In order to avoid lateral bipolar action the P-base is connected to1 the N + on the source side via an ohmic contact. Such enhancement mode devices with gate lengths of 1.5um have an Ft of 5GHz and an Fmax of 9GHz with breakdswins as high as 6OV. Compared to GaAs MESFET technologies [31 for the same gate length the Ft and Fmax is about half for the silicon MOSFETs. This 1.5um technology is well suited for radio applications a t 9OOMHz and with appropriate gate scaling, operation a t 3GHz can be achieved using 0.6um photo-lithography. A small signal equivalent circuit for thiij 1 .sum device is given in Figure 2. Large signal models for this technology have also tieen derived and Figure 3 shows the measured vs modeled results for a SPICE level 3 model.