Modeling and Analysis of 3D IC Structures for Heat Mitigation by Thermal Through Silicon Vias

Abstract

Three-dimensional integrated circuits (3D ICs) have the potential to overcome the limitations of planer and conventional structure and such methodology has become a promising technology with (i) short interconnection, (ii) heterogeneous integration, (iii) low power consumption and (iv) minimizing scaling issues. This new technique has the potential to bring one paradigm shift to the present bottleneckness of conventional integration. As this new platform need heat management for better performance, thermal through silicon vias (TTSV) are considered as best possible way to reduce the heat generated within different layers of IC. The impact of hotspot in different layers of 3D IC structures is analyzed in this paper. The temperature dependent results for the issues of hotspot alignment within three different structures are provided to aim some realistic execution in designing TTSV for effective thermo-mechanical issues. This work investigates current and temperature profile of three different 3D IC structure.