A Re-Configurable Ray-Triangle Vector Accelerator for Emerging Fog Architectures

Abstract

One of the biggest challenges in computer graphics is to produce photo-realistic images from a three-dimensional scene. On one hand, there are fast ways of rendering an image that often cannot portray the light behavior accurately. On the other hand, the most accurate methods, like the Ray-Tracing algorithm, are very costly regarding computing resources and takes a substantial amount of time to render a single frame. Many new techniques were conceived with the purpose of accelerating ray-tracing applications while obtaining results close to the desired. Moreover, Field-Programmable Gate Arrays (FPGAs) have recently become useful not only to prototype novel systems but also to run specialized parallel accelerators to execute the critical path of a given application. Nonetheless, embedded devices with processing capabilities and internet access generate a substantial increase of network traffic against distributed systems and cloud services, stimulating the development of Edge/Fog/In-Situ architectures and technologies. Thus, in this work, we present and analyze a Re-configurable Vector Accelerator specified in High-Level Synthesis (HLS) and the concept of a fog system that may use it. The accelerator is specialized in computing ray-triangle intersections and can be used in a distributed rendering environment. It has been implemented in a Xilinx Kintex Ultrascale FPGA (xcku060-ffva1156-2-e) using Xilinx Vivado tools. Experimental performance and energy consumption results show that the accelerator can efficiently render a simplified version of the Stanford Bunny model using different configurations with 1,2,4 and 8 Vector Cores.