Switching behaviour of a BIMOS switching stage

Abstract

The switching behaviour of a BIMOS switching stage is investigated, taking into account the most important parasitic network and device parameters. Its short-circuit behaviour is also discussed and ways of improving it are presented. The power range is expanded by connecting power MOSFETs in parallel and extending the switching behaviour of the Darlington stage. The parallel-switching of FETs is also analysed. Possible ways of reducing dynamic and static losses are discussed in a power-loss treatment.