A 179-mW 2304-bit flexible LDPC decoder for Wireless-MAN applications

Abstract

A 2304-bit flexible decoder for low-density parity-check (LDPC) codes is presented for Wireless-MAN applications. Based on modified turbo-decoding message-passing (M-TDMP) algorithm, the decoder achieves low complexity as well as fast convergence which produces high throughput of 138 Mbps working at 50 MHz. By adopting a novel scheme for early termination of iteration, the proposed decoder obtains large power efficiency. The decoder is implemented in SMIC 0.18 ¿m 1P6M CMOS technology, features a power dissipation of 179-mW operating at 50 MHz, and costs an area of 12.5 mm2.