High Performance CMOS Voltage Level Shifters Design for Low Voltage Applications

Abstract

To convert signals from one logic level or voltage level to another, a level shifter circuit is used in analog and digital integrated circuits (IC’s). It is also known as a voltage level translator or a logic-level shifter. An integrated circuit voltage level changer allows for compatibility across integrated circuits with various voltage needs. In this work, a voltage level shifter that efficiently converts voltage from the subthreshold area to the super-threshold region while reducing propagation latency is introduced. The proposed circuit improves power efficiency and delays by employing a low voltage converter, one Pull Down and one Pull Up CMOS network. We simulate the proposed design in 45nm, 65nm, 90nm and 180nm CMOS technologies. The simulated result shows that, by employing the proposed level shifter an improvement of 69.12% in propagation delay is observed as compared to recent designs in 90nm CMOS technology. In 45nm technology our design improves the propagation delay 67.07% compared to existing designs. In corner analysis the proposed technique gives better result as compared to the recently reported techniques.