Dual-k Spacer JAM-GS-GAA FinFET: A Device for Low Power Analog Applications

Abstract

Using the Atlas 3D tool, the authors of this research conducted an in-depth investigation on the influence of dual-k spacer on the Junctionless Accumulation Mode Gate Stack Gate All Around (JAM-GS-GAA) FinFET for the low power analog applications. The simulated results show that because of the fringing field effects, the dual-k (SiO2 + HfO2) spacer substantially reduces the leakage parameters and enhances the analog performance. In comparison to the conventional FinFET, the dual-k spacer configuration has been shown to have a switching ratio that is increased by 102 times and a quality factor that is increased by 46.75% when run through a simulation. In addition, a dual-k spacer configuration also improves the leakage current and subthreshold swing by 98.69% and 15.51%. Thus, the dual-k spacer JAM-GS-GAA FinFET might be an enticing solution for high-performance and low-power analog applications.