{"title":"Virtual Memory Support for PIM with Table-Based Management","authors":"Seung Jae Yong, Eui-Young Chung","doi":"10.1109/ITC-CSCC58803.2023.10212961","DOIUrl":null,"url":null,"abstract":"Processing-in-Memory (PIM) is a technology to alleviate the memory wall. In the PIM architecture, there are processing units for data operations in the memory. Therefore, since data is processed directly in the memory, there is no need to transfer data between the CPU and memory, which can reduce energy consumption and latency associated with data movement. However, the current operating system (OS) lacks virtual memory support for the PIM architecture. Therefore, there is a significant delay in accessing PIM due to the overhead of the existing multi-level page table walking every time. In this paper, we propose a technique for efficiently mapping virtual addresses to physical addresses in PIM using table-based management. Our technique has the advantage of reducing unnecessary delays and maximizing the use of PIM without any hardware modifications or support. The proposed technique is evaluated using a full system simulator, and the results show that the PIM access time can be improved by approximately 15.04 times compared to the existing system.","PeriodicalId":220939,"journal":{"name":"2023 International Technical Conference on Circuits/Systems, Computers, and Communications (ITC-CSCC)","volume":"47 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 International Technical Conference on Circuits/Systems, Computers, and Communications (ITC-CSCC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ITC-CSCC58803.2023.10212961","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Processing-in-Memory (PIM) is a technology to alleviate the memory wall. In the PIM architecture, there are processing units for data operations in the memory. Therefore, since data is processed directly in the memory, there is no need to transfer data between the CPU and memory, which can reduce energy consumption and latency associated with data movement. However, the current operating system (OS) lacks virtual memory support for the PIM architecture. Therefore, there is a significant delay in accessing PIM due to the overhead of the existing multi-level page table walking every time. In this paper, we propose a technique for efficiently mapping virtual addresses to physical addresses in PIM using table-based management. Our technique has the advantage of reducing unnecessary delays and maximizing the use of PIM without any hardware modifications or support. The proposed technique is evaluated using a full system simulator, and the results show that the PIM access time can be improved by approximately 15.04 times compared to the existing system.