On the validity of trace-driven simulation for multiprocessors

Abstract

Trace-driven simulation is a commonly-used technique for evaluating multiprocessor memory systems. However, several open questions exist concerning the validity of multiprocessor traces. One is the extent to which tracing induced dilation affects the traces and consequently the results of the simulations. A second is whether the traces generated from multiple runs of the same program will yield the same simulation results. This study examines the variation in simulation results caused by both dilation and multiple runs of the same program on a shared-memory multiprocessor. Overall, our results validate the use of trace-driven simulation for these machines: variability due to dilation and multiple runs appears to be small. However, where small differences in simulated results are crucial to design decisions, multiple traces of parallel applications should be examined.