{"title":"High Radix Montgomery Modular Multiplier on Modern FPGA","authors":"Pingjian Wang, Zongbin Liu, Lei Wang, Neng Gao","doi":"10.1109/TrustCom.2013.180","DOIUrl":null,"url":null,"abstract":"Montgomery algorithm is the most common mechanism for implementing modular multiplication. This work proposes a new systolic architecture to perform high radix Montgomery algorithm on modern FPGA, which is rich in dedicated hardcore multiplier resources, and the new architecture is suitable to be used in public key coprocessors. In the modern FPGA application design, using dedicated hardcore in FPGA is the recommended designing ideas. In this work, by following this new design concept, the new multiplier architecture can reach to a high throughput. Compared with the same architecture work, the improved architecture saves nearly half of the dedicated multiplier in FPGA.","PeriodicalId":206739,"journal":{"name":"2013 12th IEEE International Conference on Trust, Security and Privacy in Computing and Communications","volume":"107 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-07-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 12th IEEE International Conference on Trust, Security and Privacy in Computing and Communications","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/TrustCom.2013.180","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
Montgomery algorithm is the most common mechanism for implementing modular multiplication. This work proposes a new systolic architecture to perform high radix Montgomery algorithm on modern FPGA, which is rich in dedicated hardcore multiplier resources, and the new architecture is suitable to be used in public key coprocessors. In the modern FPGA application design, using dedicated hardcore in FPGA is the recommended designing ideas. In this work, by following this new design concept, the new multiplier architecture can reach to a high throughput. Compared with the same architecture work, the improved architecture saves nearly half of the dedicated multiplier in FPGA.