{"title":"Design and optimization of non-volatile memory based on Memristor System","authors":"Mohammad Hemmati, M. Dolatshahi, S. M. Zanjani","doi":"10.1109/ICCKE50421.2020.9303681","DOIUrl":null,"url":null,"abstract":"Memristor is a type of memory resistor that has analog behaviour. That is, the resistor is programmable between the two modes with the minimum resistance and the maximum resistance, and its values are retained until subsequent voltage implementations. Non-volatility, memory friendliness, analog and high switching performance, minuteness and its capability to integrate with integrated circuits are prominent advantages of this element. In this paper, we perform a physical and behavioural modelling using a structural model designed to evaluate memristor behaviour. Initially, a 4-by-4 cross-over structure is designed. The memory array consists of four vertical nano-wires and four horizontal nano-wires that cross over each other and a memristor is located at the intersection of each nano-wire. In the Memristor structure positive terminal is connected to the vertical nano-wire and its negative terminal to the horizontal nano-wire. The data sequence [1010] in the first column of the array is written in (4, 1), (3, 1), (2, 1), (1,1) cells respectively and then is read from them. Finally, by examining the details of the element behaviour, changing its parameters such as frequency, input voltage and varying Roff and Ron range and employment of a model, designed for simulation, the output results are obtained. Keywords— Memristor, Physical Model, Thin Layer, Logical Operational Implementation","PeriodicalId":402043,"journal":{"name":"2020 10th International Conference on Computer and Knowledge Engineering (ICCKE)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-10-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 10th International Conference on Computer and Knowledge Engineering (ICCKE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCKE50421.2020.9303681","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
Memristor is a type of memory resistor that has analog behaviour. That is, the resistor is programmable between the two modes with the minimum resistance and the maximum resistance, and its values are retained until subsequent voltage implementations. Non-volatility, memory friendliness, analog and high switching performance, minuteness and its capability to integrate with integrated circuits are prominent advantages of this element. In this paper, we perform a physical and behavioural modelling using a structural model designed to evaluate memristor behaviour. Initially, a 4-by-4 cross-over structure is designed. The memory array consists of four vertical nano-wires and four horizontal nano-wires that cross over each other and a memristor is located at the intersection of each nano-wire. In the Memristor structure positive terminal is connected to the vertical nano-wire and its negative terminal to the horizontal nano-wire. The data sequence [1010] in the first column of the array is written in (4, 1), (3, 1), (2, 1), (1,1) cells respectively and then is read from them. Finally, by examining the details of the element behaviour, changing its parameters such as frequency, input voltage and varying Roff and Ron range and employment of a model, designed for simulation, the output results are obtained. Keywords— Memristor, Physical Model, Thin Layer, Logical Operational Implementation