A Four-Legged H-Bridge Inverter Topology for Cascaded Multilevel Inverter

Abstract

This paper presents a 13-level topology for cascaded multilevel inverters. The topology is constructed by connecting an extra leg in parallel with each leg of H-Bridge inverter topology. Each extra leg contains two switches and two dc-sources. The switching table is designed to produce 13-levels when voltage sources have three different magnitudes. The cascaded connection of two blocks of the proposed topology yields 25-levels. These voltage levels can be further increased if different voltage sources are assumed for second block. In order to control the output voltage of the proposed topology, universal pulse width modulation scheme is used. Finally, simulations are performed in MATLAB/Simulink environment to confirm the validity of the proposed scheme.