A programmable BIST with macro and micro codes for embedded SRAMs

Abstract

This paper presents a programmable built-in self-test (PBIST) methodology for embedded SRAMs. The BIST logic adapts the test controller with micro code encoding technique in order to control test operation sequences. The macro codes are used to select any of seven MARCH algorithms, and detect different faults of the memory under test (MUT). This BIST supports both the test and normal operation modes. The experimental results show that this work gives 17–47% improved area overhead and 16–41% enhanced speed compared to three published results.