Thermal-aware task and data co-allocation for multi-processor system-on-chips with 3D-stacked memories

Abstract

Multi-Processor Systems-on-Chips (MPSoCs) with 3D-stakced memories frequently work under thermal emergent status due to its high power density. Several thermal-aware task allocation or data placement methods have been proposed for 3D ICs to reduce the number of time-consuming dynamic thermal managements techniques being invoked. However, we observe that, these thermal-aware software designs all consider task allocation or data placement only. Studies show that, with the increasing number of stacked memories and the widening of vertical buses, heat generated by memories is comparable to processors, and synergistically performing thermal control on both processors and memories is a must since vertically aligned modules have the greatest thermal impacts to each other. So, in this paper, we propose the first thermal-aware task and data co-allocation method for MPSoCs with 3D-stacked memories. The proposed method synergistically places data and task considering the heterogeneity of cores and memories to optimize system performance under the given thermal constraint. Among all our test cases, compared to a performance-aware software design, the proposed method has at most 26% performance degradation while the system temperature are kept under the threshold and the performance-aware method has 108.4°C over the threshold. Compared to thermal-aware design that respectively considers data allocation and task allocation only, the proposed method achieves 9.76% of performance improvements on the average.