SCRIP: Secure Random Clock Execution on Soft Processor Systems to Mitigate Power-based Side Channel Attacks

Darshana Jayasinghe, A. Ignjatović, S. Parameswaran
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引用次数: 3

Abstract

Power-based side channel attacks are effective in revealing the secret keys of cryptographic algorithm implementations running on soft processor systems. This paper, for the first time, proposes a clock random execution methodology (referred to as SCRIP) to execute a soft processor core and most of the components (some components cannot be executed with a random clock frequency). An open source soft processor system (LowRISC which is based on the RISC-V Instruction Set Architecture) has been executed with the proposed SCRIP clock random execution methodology. Power analysis attacks (including preprocessing techniques to remove the effects of random execution) were carried out against the SCRIP LowRISC soft processor implementation to test the effects of random clock execution. SCRIP LowRISC implementation is shown to be secure for up to 300,000 encryptions, while the LowRISC implementation without SCRIP revealed the secret key within 1,000 encryptions. The result of information leakage test shows that the secret key cannot be recovered with 99.999% confidence level. Compared to other soft core processor countermeasures, SCRIP LowRISC implementation has the smallest complete soft processor system with 1.04× resource overhead (the smallest hardware masking countermeasure, which is applied to only the ALU of a RISC-V processor has 1.59× resource overhead, and the smallest balancing countermeasure soft processor, with the countermeasure applied only to the ALU and the memory, required 1.15× area overhead) where the security against power analysis attacks is applied to most components of the processor (including ALU, caches, Block RAM, Block RAM controller, bus interconnect and SD card interface). SCRIP LowRISC implementation is the first soft processor with a random execution-based countermeasure to withstand preprocessing methods (such as power trace alignment and noise filtering) which remove the effects of random execution.
软处理器系统上的安全随机时钟执行以减轻基于功率的侧信道攻击
基于功率的侧信道攻击可以有效地泄露软处理器系统上加密算法实现的密钥。本文首次提出了一种时钟随机执行方法(简称SCRIP)来执行软处理器核心和大部分组件(有些组件不能以随机时钟频率执行)。一个基于RISC-V指令集架构的开源软处理器系统(LowRISC)已经使用提出的SCRIP时钟随机执行方法执行。功耗分析攻击(包括消除随机执行影响的预处理技术)针对SCRIP LowRISC软处理器实现进行,以测试随机时钟执行的影响。SCRIP LowRISC实现在多达30万次加密中是安全的,而没有SCRIP的LowRISC实现在1000次加密中泄露密钥。信息泄漏测试结果表明,密钥无法以99.999%的置信度恢复。与其他软核处理器对策相比,SCRIP LowRISC实现具有最小的完整软处理器系统,资源开销为1.04倍(最小的硬件屏蔽对策,仅应用于RISC-V处理器的ALU,资源开销为1.59倍);最小的平衡对策软处理器,仅应用于ALU和内存。需要1.15倍的面积开销),其中针对功耗分析攻击的安全性应用于处理器的大多数组件(包括ALU,缓存,块RAM,块RAM控制器,总线互连和SD卡接口)。SCRIP LowRISC实现是第一个具有基于随机执行的对策的软处理器,可以承受消除随机执行影响的预处理方法(如功率跟踪对齐和噪声滤波)。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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