A Low-Voltage and Area-Efficient Adaptive SI SDADC for Bio-Acquisition Microsystems

Chih-Jen Cheng, Shuenn-Yuh Lee, Yuan Lo
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Abstract

An ultra-low voltage adaptive Sigma-Delta Analog-to-Digital Converter (SDADC) with a 10-bit dynamic range for bio-microsystem applications is presented. The proposed SDADC includes a Switched-current Sigma-Delta Modulator (SISDM) and a digital decimator. Moreover, a new single-multiplier structure is presented to implement the Finite Impulse Response (FIR) digital filters which are the major hardware elements in the decimator. Measurement results show that the SISDM has a dynamic range over 6 dB and a power consumption of 180 muW with an input signal of 1.25 kHz sinusoid wave and 5 kHz bandwidth under a single 0.8 V power supply for ENG signals. Besides, the post layout simulations of SDADC including SISDM and decimator reveal that the dynamic range is still over 60 dB without harming by digital circuits.
一种用于生物采集微系统的低压高效自适应SI SDADC
介绍了一种适用于生物微系统的10位动态范围的超低电压自适应Sigma-Delta模数转换器(sadc)。所提出的sdac包括一个开关电流Sigma-Delta调制器(SISDM)和一个数字十进制。此外,提出了一种新的单乘法器结构来实现有限脉冲响应(FIR)数字滤波器,这是抽取器的主要硬件元件。测量结果表明,在单电源0.8 V的ENG信号下,SISDM的动态范围大于6 dB,功耗为180 muW,输入信号为1.25 kHz正弦波,带宽为5 kHz。此外,对ssddc(包括SISDM和decimator)的后期布局仿真表明,在不受数字电路影响的情况下,动态范围仍在60 dB以上。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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