{"title":"Integrated memory array processor and real-time vision system for vehicle control","authors":"S. Okazaki, Y. Fujita, T. Ikeda","doi":"10.1109/VNIS.1994.396857","DOIUrl":null,"url":null,"abstract":"This paper describes the integrated memory array processor architecture (IMAP), which enables high-speed image processing in compact implementation, and its application to real-time image processing for vision-based vehicle control and traffic surveillance systems. IMAP integrates three fundamental functions for image processing, i.e. a large capacity image memory, a processing array and input/output shift registers. The prototype LSI integrates eight 8-bit processors and a 144 Kbit SRAM on a single chip, where the processors operates in SIMD manner at 200 MIPS (25 MHz). Since the on-chip image memory can be accessed by external devices independently of the internal processing, the prototype LSI can be used as an intelligent VRAM. The real-time vision system (RVS) has been developed by using 64 prototype LSIs connected in series. The RVS is a 512-processor SIMD system whose peak performance reaches 7.7 GIPS at 15 MHz clock. RVS performance is also shown in basic low-level image processings which are useful for vision-based vehicle control and traffic surveillance systems. RVS executes most of them in about one millisecond.<<ETX>>","PeriodicalId":338322,"journal":{"name":"Proceedings of VNIS'94 - 1994 Vehicle Navigation and Information Systems Conference","volume":"13 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1994-08-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of VNIS'94 - 1994 Vehicle Navigation and Information Systems Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VNIS.1994.396857","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This paper describes the integrated memory array processor architecture (IMAP), which enables high-speed image processing in compact implementation, and its application to real-time image processing for vision-based vehicle control and traffic surveillance systems. IMAP integrates three fundamental functions for image processing, i.e. a large capacity image memory, a processing array and input/output shift registers. The prototype LSI integrates eight 8-bit processors and a 144 Kbit SRAM on a single chip, where the processors operates in SIMD manner at 200 MIPS (25 MHz). Since the on-chip image memory can be accessed by external devices independently of the internal processing, the prototype LSI can be used as an intelligent VRAM. The real-time vision system (RVS) has been developed by using 64 prototype LSIs connected in series. The RVS is a 512-processor SIMD system whose peak performance reaches 7.7 GIPS at 15 MHz clock. RVS performance is also shown in basic low-level image processings which are useful for vision-based vehicle control and traffic surveillance systems. RVS executes most of them in about one millisecond.<>