Compact Design of 60-GHz Wilkinson Power Dividers in a 65-nm CMOS Process for Monolithic Microwave Integrated Circuits

Hongyu Bao, S. Lam
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引用次数: 1

Abstract

This paper reports miniature designs of 60-GHz Wilkinson power dividers based on a multi-metallization transmission line structure for monolithic microwave integrated circuits (MMICs). In a 65-nm 2P8M CMOS process, a straight elongated design occupies an area of 56 × 610 μm2, giving an insertion loss lower than 0.89 dB, a return loss better than 30 dB and an isolation higher than 45 dB at 60 GHz. The meandered design further reduces the chip area to 68 × 310 μm2 (≈ 0.021 mm2) and it also provides a low power loss and a high isolation in a frequency range over 20 GHz. The compact designs are extendable to other deep sub-micron CMOS processes for development of MMICs.
基于65纳米CMOS工艺的60ghz Wilkinson功率分压器的紧凑设计
本文报道了基于多金属化传输线结构的60 ghz威尔金森功率分配器的微型化设计。在65 nm的2P8M CMOS工艺中,采用56 × 610 μm2的直长形设计,在60 GHz时的插入损耗低于0.89 dB,回波损耗优于30 dB,隔离度高于45 dB。弯曲设计进一步将芯片面积减小到68 × 310 μm2(≈0.021 mm2),并且在超过20 GHz的频率范围内提供低功耗和高隔离性。紧凑的设计可扩展到其他深亚微米CMOS工艺,以开发mmic。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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