Stride-directed prefetching for secondary caches

Sunil Kim, A. Veidenbaum
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引用次数: 28

Abstract

This paper studies hardware prefetching for second-level (L2) caches. Previous work on prefetching has been extensive but largely directed at primary caches. In some cases only L2 prefetching is possible or is more appropriate. By studying L2 prefetching characteristics we show that existing stride-directed methods for L1 caches do not work as well in L2 caches. We propose a new stride-detection mechanism for L2 prefetching and combine it with stream buffers used in Palacharla and Kessler, (1994). Our evaluation shows that this new prefetching scheme is more effective than stream buffer prefetching particularly for applications with long-stride accesses. Finally, we evaluate an L2 cache prefetching organization which combines a small L2 cache with our stride-directed prefetching scheme. Our results show that this system performs significantly better than stream buffer prefetching or a larger non-prefetching L2 cache without suffering from a significant increase in the memory traffic.
二级缓存的定向步进预取
本文研究了二级(L2)缓存的硬件预取。先前关于预取的工作非常广泛,但主要针对主缓存。在某些情况下,只有L2预取是可能的或更合适的。通过研究L2预取特性,我们发现现有的用于L1缓存的步进定向方法在L2缓存中并不适用。我们提出了一种用于L2预取的新的跨距检测机制,并将其与Palacharla和Kessler(1994)中使用的流缓冲区相结合。我们的评估表明,这种新的预取方案比流缓冲区预取更有效,特别是对于具有长跨距访问的应用程序。最后,我们评估了一个L2缓存预取组织,它将一个小的L2缓存与我们的跨向预取方案相结合。我们的结果表明,该系统的性能明显优于流缓冲区预取或更大的非预取L2缓存,而不会显著增加内存流量。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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