On simulating faults in parallel

V. Iyengar, D. Tang
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引用次数: 20

Abstract

Hardware engines (e.g. YSE and EVE) have been built to perform functional simulation of large designs over many patterns. The authors present a method of simulating faults in parallel that is applicable to these hardware simulation engines (and to software simulators with similar characteristics). A notion of independence between faults is used to determine the faults that can be simulated in parallel. An efficient algorithm is developed to determine the independent subsets of faults. Results of applying the algorithm to large examples are presented and shown to be very good by comparing them with theoretical lower bounds. This technique makes it feasible to fault simulate large networks using these hardware simulation engines.<>
并行故障模拟
硬件引擎(例如YSE和EVE)已经被构建来执行许多模式的大型设计的功能模拟。作者提出了一种并行模拟故障的方法,该方法适用于这些硬件仿真引擎(以及具有类似特征的软件模拟器)。故障之间的独立性概念用于确定可以并行模拟的故障。提出了一种确定故障独立子集的有效算法。将该算法应用于大型实例,并与理论下界进行了比较,结果表明该算法非常好。这种技术使得使用这些硬件仿真引擎对大型网络进行故障仿真成为可能
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