Scanrom, a novel non-volatile memory cell storing 9 bits

Abstract

We present a novel non-volatile memory cell based on a dual-gate transistor with an ONO charge-trapping dielectric underneath the drain-side gate. Multiple bits are stored along the width of the device. By contacting the gates from both sides and applying an appropriate bias difference to each, the individual bits are addressed for both reading and writing. We experimentally demonstrate reading and writing of 9 bits in a prototype cell and discuss to possibility of storing an even higher number of bits.