Design and demonstration of large 2.5D glass interposer for high bandwidth applications

Abstract

In this paper, a large 2.5D glass interposer is demonstrated with 50 um chip-level interconnect (FLI), 3/3 um line and space (L/S) escape routing, and six metal layers, which are targeted for JEDEC high bandwidth memory (HBM). Our routing design suggests that double sided panel processing with 3/3 um L/S can accommodate required signal lines for HBM. Then, 3/3 um L/S transmission lines on 25mm × 30mm glass interposers with 300 um core thickness can be realized by utilizing semi additive process. Finally, 10mm × 10m dies with daisy chains can be successfully bonded to 25mm × 30mm glass interposer with 6 metal lines using copper microbumps with SnAg solder caps.