Evaluation of the change of the residual stress in nano-scale transistors during the deposition and fine patterning processes of thin films

K. Nakahira, Hironori Tago, H. Kishi, Ken Suzuki, H. Miura, M. Yoshimaru, K. Tatsuuma
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Abstract

The embedded strain gauges in a PQC-TEG were applied to the measurement of the change of the residual stress in a transistor structure with a 50-nm wide gate during thin film processing. The change of the residual stress was successfully monitored through the process such as the deposition and etching of thin films. In addition, the fluctuation of the process such as the intrinsic stress of thin films and the height and the width of the etched structures was also detected by the statistical analysis of the measured data. The sensitivity of the measurement was 1 MPa and it was validated that the amplitude of the fluctuation exceeded 100 MPa. This technique is also effective for detecting the spatial distribution of the stress in a wafer and its fluctuation among wafers.
薄膜沉积和精细图像化过程中纳米晶体管残余应力变化的评价
采用PQC-TEG嵌入式应变片测量了50 nm宽栅极晶体管结构在薄膜加工过程中的残余应力变化。通过薄膜的沉积和蚀刻等过程,成功地监测了残余应力的变化。此外,通过对测量数据的统计分析,还检测了薄膜的固有应力和蚀刻结构的高度和宽度等过程的波动。测量灵敏度为1 MPa,并验证了波动幅度超过100 MPa。该技术还可以有效地检测晶圆内应力的空间分布及其在晶圆间的波动。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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