Investigations of the diagnosibility of digital networks with BIST

Abstract

The problem of embedded fault diagnosis in digital systems based on Built-In Self-Test (BIST) facilities is discussed. A conception for diagnosis of digital circuits, which does not use fault models, and methods for calculating the diagnosibility of the given circuit are presented. The proposed measures of diagnosibility can be used for redesign of the circuit to improve the exactness of locating the faults or faulty regions in digital circuits. Experimental results provide the data which characterize the diagnosibility of circuits for the ISCAS benchmark family.