Design of TFET with Ferroelectric Gate Material for Low Power Applications

Abstract

TFETs are modern emerging structures for scaling the devices at sub-nanometer regime to continue with Moore’s law. To upsurge the performance of TFETs, a negative capacitance concept has been introduced. Moreover, its performance can be enhanced by using Ferroelectric material as a gate oxide material. In the current paper, it has been observed that the channel surface potential amplification induced by the negative capacitance effect gives the desired characteristics of FETs. The TFETs exhibits better control of short channel effects (SCEs) over the FinFET device. The significance of the ferroelectric material with a variation of oxide length poses the use of TFETs to procure the better performance such as high on-current (Ion), lower DIBL, and smaller subthreshold swing (SS). The simulation was carried by SILVACO ATLAS, and it shows that TFETs device with ferroelectric material as a gate oxide draws attention for low power application.