10.6 A 30MHz hybrid buck converter with 36mV droop and 125ns 1% settling time for a 1.25A/2ns load transient

Lin Cheng, W. Ki
{"title":"10.6 A 30MHz hybrid buck converter with 36mV droop and 125ns 1% settling time for a 1.25A/2ns load transient","authors":"Lin Cheng, W. Ki","doi":"10.1109/ISSCC.2017.7870324","DOIUrl":null,"url":null,"abstract":"Fast load-transient responses are crucial for DC-DC converters to cope with the demands of modern highly integrated system-on-chip (SoC) designs. Various techniques have been proposed to improve transient responses by enhancing the speed of the controller, and/or by increasing the slew rate of the inductor current (SRL), as shown in Fig. 10.6.1. To enhance the speed of the controller, a capacitor-current-sensor (CCS) calibration technique with load-transient optimization (LTO) is proposed for current-mode control in [1], and zero-delay synchronized (ZDS) and quasi-current-mode hysteretic control are proposed in [2] and [3], respectively. Although these converters may achieve near-optimal transient responses (only limited by SRL), the circuit complexity is greatly increased. To increase SRL, multiphase topologies have been widely used [1], [2,4]. For an N-phase converter, SRL can be effectively increased by N times, at the expense of using N bulky inductors that increase both volume and cost. Hybrid schemes that comprise the parallel operation of the DC-DC converter and a linear regulator can improve the responses by injecting additional charging current (Ich) without adding extra inductors. In [5], activating and deactivating the hybrid scheme is accomplished by monitoring the output voltage Vo within the steady-state window [Vo-ΔVo, Vo]. However, a large ΔVo is needed for good noise immunity, and the slow SRL also requires a high Ich that increases loss during the transients.","PeriodicalId":269679,"journal":{"name":"2017 IEEE International Solid-State Circuits Conference (ISSCC)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"13","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 IEEE International Solid-State Circuits Conference (ISSCC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.2017.7870324","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 13

Abstract

Fast load-transient responses are crucial for DC-DC converters to cope with the demands of modern highly integrated system-on-chip (SoC) designs. Various techniques have been proposed to improve transient responses by enhancing the speed of the controller, and/or by increasing the slew rate of the inductor current (SRL), as shown in Fig. 10.6.1. To enhance the speed of the controller, a capacitor-current-sensor (CCS) calibration technique with load-transient optimization (LTO) is proposed for current-mode control in [1], and zero-delay synchronized (ZDS) and quasi-current-mode hysteretic control are proposed in [2] and [3], respectively. Although these converters may achieve near-optimal transient responses (only limited by SRL), the circuit complexity is greatly increased. To increase SRL, multiphase topologies have been widely used [1], [2,4]. For an N-phase converter, SRL can be effectively increased by N times, at the expense of using N bulky inductors that increase both volume and cost. Hybrid schemes that comprise the parallel operation of the DC-DC converter and a linear regulator can improve the responses by injecting additional charging current (Ich) without adding extra inductors. In [5], activating and deactivating the hybrid scheme is accomplished by monitoring the output voltage Vo within the steady-state window [Vo-ΔVo, Vo]. However, a large ΔVo is needed for good noise immunity, and the slow SRL also requires a high Ich that increases loss during the transients.
10.6用于1.25A/2ns负载瞬态的30MHz混合降压变换器,其降压为36mV,稳定时间为125ns 1%
快速的负载瞬态响应对于满足现代高度集成的片上系统(SoC)设计要求的DC-DC转换器至关重要。已经提出了各种技术,通过提高控制器的速度和/或通过增加电感电流(SRL)的转换率来改善瞬态响应,如图10.6.1所示。为了提高控制器的速度,提出了一种负载暂态优化(LTO)电容-电流传感器(CCS)校准技术用于[1]的电流模式控制,并在[2]和[3]中分别提出了零延迟同步(ZDS)和准电流模式滞回控制。虽然这些变换器可以实现接近最佳的瞬态响应(仅受SRL的限制),但电路的复杂性大大增加。为了提高SRL,多相拓扑被广泛使用[2,4]。对于N相变换器,SRL可以有效地提高N倍,代价是使用N个笨重的电感器,增加了体积和成本。混合方案包括DC-DC变换器和线性调节器的并联操作,可以通过注入额外的充电电流(Ich)而不增加额外的电感来改善响应。在[5]中,混合方案的激活和去激活是通过监测稳态窗口内的输出电压Vo来完成的[Vo-ΔVo, Vo]。然而,为了获得良好的抗噪性,需要一个大的ΔVo,而缓慢的SRL也需要一个高的Ich,这增加了瞬变期间的损耗。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信