High speed device characterization enabler: The Envelope Load-Pull system

Abstract

Characterisation, test and modelling of microwave devices and transistors are becoming the pre-requisite for the utilization in the design of modern wireless power amplifies. This serves dual purpose; on one hand it saves the effort and investment due to the possible anomaly in the expected performance of the design while on the other hand it provides a reliable performance estimation of the transistors and devices apriori. Design of matching circuit is one of the most important stages in the overall performance investigation and analysis of the Power Amplifiers (PAs). Load-pull techniques are extensively used in the synthesis of required load impedance, and in turn the design of matching circuit. This paper discusses some unique features of the Envelope Load-Pull technique and demonstrates usefulness of such features in high speed device characterization.