A Novel Sensor for Prediction of Aging Failure

Abstract

Use of sensor in data path to predict circuit failure before major errors occur in circuit performance due to reliability issues, especially negative bias temperature instability (NBTI), is common in new scaled CMOS circuits. In this paper, circuit failure prediction by timing degradation is employed to monitor semiconductor aging. For safe operation, we propose on-chip, on-line aging monitoring. The new aging sensor architecture is based on the behavior of inverter when the direct current is passing through the device. This sensor has less complexity and area overhead, while it provides higher speed with respect to similar sensors presented in the literature.