Reliability assessment of a large population of 3.3 kV, 45 A 4H-SIC MOSFETs

Abstract

In this work, we report results for the 3 lot, 77 device-per-lot high temperature-reverse bias (HTRB) test, as well as work on gate oxide reliability for 3.3 kV devices in relation to the presence of material defects. The work indicates that large scale reliable operation of 3.3 kV 4H-SIC MOSFETs is achievable using conventional 4H-SiC device processing techniques and DMOS device structures, despite the prevalence of measurable surface morphology on 3.3 kV SiC epilayers. No correlation was found between dislocation content and MOS capacitor breakdown field, measured on over 14 cm2 of combined tested 4H-SIC MOS gate area.